A single stepping technique is commonly used by debuggers in a conventional operating system (OS) environment. In particular, the single stepping technique is used to advance an application one instruction at a time, thus allowing the debugger to position the application at a particular point in the source code. Various mechanisms have been used to enable single stepping. For example, in the instruction set architecture (ISA) of the Intel® Pentium® 4 (referred to herein as the IA-32 ISA), a trap flag (TF) bit in the EFLAGS register is designated to allow a debugger to single step an application. When the TF bit is set to 1, a debug exception is generated following the completion of the next instruction. The debugger sets the TF bit after taking ownership of the debug exception (e.g., by creating a handler for the exception and assuring that the handler will be called in the event of a debug exception). However, the debug exception is generated only if the next instruction completes successfully. If the execution of the next instruction causes a fault (e.g., a page fault), the debug exception is not generated. Rather, the exception is vectored, saving the values of EFLAGS register bits and clearing the TF bit. Upon completion of the handler, the saved value of the TF bit is restored, and the instruction is re-executed. If no faults occur during the re-execution, the debug exception is generated.